Product Summary

The TMS27C240-12JL is a 262144 by 16-bit (4194304 bit), ultraviolet-light erasable, electrically programmable read-only memory(EPROM). The TMS27C240-12JL is 262144 by 16-bit (4194304-bit), one-time programmable (OTP) electrically programmable rad-only memories (PROMs). The TMS27C240-12JL is fabricated using power-saving CMOS technology for high speed and simple interface with MOS and bipolar circuits. All inputs (including program data inputs) can be driven by Series 74 TTL circuits without the use of external pull-up resistors. Each output can drive one Series 74 TTL circuit without external resistors. The TMS27C240-12JL EPROM is offered in a dual-in-line ceramic package (J suffix) designed for insertion in mounting hole rows on 15, 2-mm (600-mil) centers. The TMS27C240 is offered with two choices of temperature ranges of 0℃ to 70℃ (JL suffix) and – 40℃ to 85℃ (JE suffix).

Parametrics

TMS27C240-12JL absolute maximum ratings: (1)Supply voltage range, VCC: –0.6 V to 7 V; (2)Supply voltage range, VPP: –0.6 V to 13 V; (3)Input voltage range (see Note 1): All inputs except A9: –0.6 V to VCC + 1 V; (4)A9: –0.6 V to 13.5 V; (5)Output voltage range: –0.6 V to VCC + 1 V; (6)Operating free-air temperature range: 0℃ to 70℃; (7)Storage temperature range, Tstg: –65℃ to 150℃.

Features

TMS27C240-12JL features: (1)Organization: 262144 by 16 Bits; (2)Single 5-V Power Supply; (3)All Inputs/Outputs Fully TTL Compatible; (4)Static Operations (No Clocks, No Refresh); (5)Max Access/Min Cycle Time VCC ± 10% 27C/PC240-12: 120ns; (6)16-Bit Output For Use in Microprocessor-Based Systems; (7)Very High Speed SNAP Pulse Programming; (8)Power-Saving CMOS Technology; (9)3-State Output Buffers; (10)400-mV Minimum DC Noise Immunity With Standard TTL Loads; (11)Latchup Immunity of 250 mA on All Input and Output Lines; (12)No Pullup Resistors Required; (13)Low Power Dissipation (VCC = 5.5 V) Active: 275 mW Worst Case; (14)Standby: 0.55 mW Worst Case (CMOS-Input Levels); (15)Temperature Range Options.

Diagrams

TMS27C240-12JL Pin Configuration

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