Product Summary

The XC3SD3400A-4FGG676C is a member of Spartan-3A DSP family of Field-Programmable Gate Arrays (FPGAs), which solves the design challenges in most high- volume, cost-sensitive, high-performance DSP applications. The XC3SD3400A-4FGG676C offers densities ranging from 1.8 to 3.4 million system gates. The XC3SD3400A-4FGG676C builds on the success of the Spartan-3A FPGA family by increasing the amount of memory per logic and adding XtremeDSP DSP48A slices. The Spartan-3A DSP FPGAs extend and enhance the Spartan-3A FPGA family. The XC3SD3400A-4FGG676C is tailored for DSP applications and have additional block RAM and XtremeDSP DSP48A slices.The Spartan-3A DSP family is a superior alternative to mask programmed ASICs. FPGAs avoid the high initial cost, lengthy development cycles, and the inherent inflexibility of conventional ASICs. Also, FPGA programmability permits design upgrades in the field with no hardware replacement necessary, an impossibility with ASICs.

Parametrics

XC3SD3400A-4FGG676C absolute maximum ratings: (1)VCCINT, Internal supply voltage: –0.5 to 1.32 V; (2)VCCAUX, Auxiliary supply voltage: –0.5 to 3.75 V; (3)VCCO, Output driver supply voltage: –0.5 to 3.75 V; (4)VREF, Input reference voltage: –0.5 to VCCO+0.5 V; (5)IIK, Input clamp current per I/O pin, –0.5V < VIN < (VCCO + 0.5V) : ±100mA; (6)VESD, Electrostatic Discharge Voltage: Human body model: ±2000 V; Charged device model: ±500 V; Machine model: ±200 V; (7)TJ, Junction temperature: 125℃; (8)TSTG, Storage temperature: –65 to 150℃.

Features

XC3SD3400A-4FGG676C features: (1)Very low cost, high-performance DSP solution for high-volume, cost-conscious applications; (2)250 MHz XtremeDSP DSP48A Slices; (3)Hierarchical Select RAM memory architecture; (4)Suspend, Hibernate modes reduce system power; (5)Low-power option reduces quiescent current; (6)Multi-voltage, multi-standard Select IO interface pins; (7)Abundant, flexible logic resources; (8)Eight Digital Clock Managers (DCMs); (9)Eight low-skew global clock networks, eight additional clocks per half device, plus abundant low-skew routing; (10)Configuration interface to industry-standard PROMs; (11)Micro Blaze and Pico Blaze embedded processor cores; (12)BGA and CSP packaging with Pb-free options; (13)XA Automotive version available.

Diagrams

XC3SD3400A-4FGG676C block diagram

Image Part No Mfg Description Data Sheet Download Pricing
(USD)
Quantity
XC3SD3400A-4FGG676C
XC3SD3400A-4FGG676C


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Quantity
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